1use super::{BufferArena, sizes::BufferSizes};
6use crate::gpu::{DevicePtr, GpuBackend};
7
8impl BufferArena {
9 pub fn hidden_states(&self) -> DevicePtr {
10 self.hidden_states
11 }
12 pub fn residual(&self) -> DevicePtr {
13 self.residual
14 }
15 pub fn norm_output(&self) -> DevicePtr {
16 self.norm_output
17 }
18 pub fn qkv_output(&self) -> DevicePtr {
19 self.qkv_output
20 }
21 pub fn attn_output(&self) -> DevicePtr {
22 self.attn_output
23 }
24 pub fn gate_logits(&self) -> DevicePtr {
25 self.gate_logits
26 }
27 pub fn gate_logits_f32(&self) -> DevicePtr {
28 self.gate_logits_f32
29 }
30 pub fn moe_router_in_f32(&self) -> DevicePtr {
31 self.moe_router_in_f32
32 }
33 pub fn moe_output(&self) -> DevicePtr {
34 self.moe_output
35 }
36 pub fn logits(&self) -> DevicePtr {
37 self.logits
38 }
39 pub fn ssm_qkvz(&self) -> DevicePtr {
40 self.ssm_qkvz
41 }
42 pub fn ssm_ba(&self) -> DevicePtr {
43 self.ssm_ba
44 }
45 pub fn ssm_deinterleaved(&self) -> DevicePtr {
47 self.ssm_deinterleaved
48 }
49 pub fn ssm_gates(&self) -> DevicePtr {
51 self.ssm_gates
52 }
53 pub fn ssm_conv_out_f32(&self) -> DevicePtr {
55 self.ssm_conv_out_f32
56 }
57 pub fn scratch(&self) -> DevicePtr {
59 self.scratch
60 }
61 pub fn ssd_scratch(&self) -> DevicePtr {
63 self.ssd_scratch
64 }
65 pub fn token_ids(&self) -> DevicePtr {
69 self.token_ids
70 }
71 pub fn scratch_bytes(&self) -> usize {
74 self.sizes.scratch
75 }
76 pub fn expert_gate_out(&self) -> DevicePtr {
78 self.expert_gate_out
79 }
80 pub fn expert_up_out(&self) -> DevicePtr {
82 self.expert_up_out
83 }
84 pub fn expert_down_out(&self) -> DevicePtr {
86 self.expert_down_out
87 }
88 pub fn gdn_fla_scratch(&self) -> DevicePtr {
92 self.gdn_fla_scratch
93 }
94 pub fn ffn_act_q8(&self) -> DevicePtr {
96 self.ffn_act_q8
97 }
98 pub fn ffn_act_a(&self) -> DevicePtr {
100 self.ffn_act_a
101 }
102 pub fn ffn_act_scale(&self) -> DevicePtr {
104 self.ffn_act_scale
105 }
106 pub fn fp8_act(&self) -> DevicePtr {
109 self.fp8_act
110 }
111 pub fn fp8_act_bytes(&self) -> usize {
113 self.sizes.fp8_act
114 }
115 pub fn fp8_act_scale(&self) -> DevicePtr {
117 self.fp8_act_scale
118 }
119 pub fn q2_dequant_scratch(&self) -> DevicePtr {
123 self.q2_dequant_scratch
124 }
125 pub fn q2_dequant_scratch_bytes(&self) -> usize {
127 self.sizes.q2_dequant_scratch
128 }
129 pub fn q2_act_q8(&self) -> DevicePtr {
132 self.q2_act_q8
133 }
134 pub fn q2_act_q8_bytes(&self) -> usize {
136 self.sizes.q2_act_q8
137 }
138 pub fn splitk_workspace(&self) -> DevicePtr {
139 self.splitk_workspace
140 }
141 pub fn o_latent(&self) -> DevicePtr {
143 self.o_latent
144 }
145 pub fn norm_unit_w(&self) -> DevicePtr {
147 self.norm_unit_w
148 }
149 pub fn hc_streams(&self) -> DevicePtr {
151 self.hc_streams
152 }
153
154 pub fn hc_lowrank_scratch(&self) -> DevicePtr {
157 self.hc_lowrank_scratch
158 }
159 pub fn qsa_select_scratch(&self) -> DevicePtr {
162 self.qsa_select_scratch
163 }
164 pub fn hc_post(&self) -> DevicePtr {
166 self.hc_post
167 }
168 pub fn hc_comb(&self) -> DevicePtr {
170 self.hc_comb
171 }
172 pub fn max_batch_tokens(&self) -> usize {
173 self.max_batch_tokens
174 }
175 pub fn decode_meta(&self) -> super::DecodeMetaLayout {
178 self.decode_meta
179 }
180 pub fn sizes(&self) -> &BufferSizes {
181 &self.sizes
182 }
183
184 pub fn lora_xa(&self) -> DevicePtr {
195 self.lora_xa
196 }
197 pub fn lora_xa_bytes(&self) -> usize {
199 self.sizes.lora_xa
200 }
201 pub fn lora_delta(&self) -> DevicePtr {
204 self.lora_delta
205 }
206 pub fn lora_delta_bytes(&self) -> usize {
208 self.sizes.lora_delta
209 }
210 pub fn lora_hact(&self) -> DevicePtr {
213 self.lora_hact
214 }
215 pub fn lora_hact_bytes(&self) -> usize {
217 self.sizes.lora_hact
218 }
219 pub fn lora_seq_slot(&self) -> DevicePtr {
223 self.lora_seq_slot
224 }
225
226 pub fn debug_buffer_checksum(&self, gpu: &dyn GpuBackend, stream: u64, tag: &str) {
227 gpu.synchronize(stream).ok();
228 let probe = |name: &str, ptr: DevicePtr, bytes: usize| {
229 let mut hb = vec![0u8; bytes];
230 if gpu.copy_d2h(ptr, &mut hb).is_err() {
231 return;
232 }
233 let (mut sum, mut ssq, mut sabs) = (0f64, 0f64, 0f64);
234 for c in hb.chunks_exact(4) {
235 let v = f32::from_le_bytes([c[0], c[1], c[2], c[3]]) as f64;
236 if v.is_finite() {
237 sum += v;
238 ssq += v * v;
239 sabs += v.abs();
240 }
241 }
242 tracing::warn!(
243 "ATLAS_BUF_CKSUM[{tag}] {name} bytes={bytes} sum={sum:.6} ssq={ssq:.6} sabs={sabs:.6}"
244 );
245 };
246 probe(
247 "hidden_states",
248 self.hidden_states,
249 self.sizes.hidden_states,
250 );
251 probe("residual", self.residual, self.sizes.residual);
252 probe("norm_output", self.norm_output, self.sizes.norm_output);
253 probe("qkv_output", self.qkv_output, self.sizes.qkv_output);
254 probe("attn_output", self.attn_output, self.sizes.attn_output);
255 probe("gate_logits", self.gate_logits, self.sizes.gate_logits);
256 probe("moe_output", self.moe_output, self.sizes.moe_output);
257 probe("ssm_qkvz", self.ssm_qkvz, self.sizes.ssm_qkvz);
258 probe("ssm_ba", self.ssm_ba, self.sizes.ssm_ba);
259 probe(
260 "ssm_deinterleaved",
261 self.ssm_deinterleaved,
262 self.sizes.ssm_deinterleaved,
263 );
264 probe("ssm_gates", self.ssm_gates, self.sizes.ssm_gates);
265 probe(
266 "ssm_conv_out_f32",
267 self.ssm_conv_out_f32,
268 self.sizes.ssm_conv_out_f32,
269 );
270 probe(
271 "expert_gate_out",
272 self.expert_gate_out,
273 self.sizes.expert_gate_out,
274 );
275 probe(
276 "expert_up_out",
277 self.expert_up_out,
278 self.sizes.expert_up_out,
279 );
280 probe(
281 "expert_down_out",
282 self.expert_down_out,
283 self.sizes.expert_down_out,
284 );
285 probe(
286 "splitk_workspace",
287 self.splitk_workspace,
288 self.sizes.splitk_workspace,
289 );
290 }
291
292 pub fn zero_prefill_essentials(&self, gpu: &dyn GpuBackend, stream: u64) -> anyhow::Result<()> {
307 gpu.memset_async(self.hidden_states, 0, self.sizes.hidden_states, stream)?;
308 gpu.memset_async(self.residual, 0, self.sizes.residual, stream)?;
309 gpu.memset_async(self.gate_logits, 0, self.sizes.gate_logits, stream)?;
313 gpu.memset_async(self.expert_gate_out, 0, self.sizes.expert_gate_out, stream)?;
314 gpu.memset_async(self.expert_up_out, 0, self.sizes.expert_up_out, stream)?;
315 gpu.memset_async(self.expert_down_out, 0, self.sizes.expert_down_out, stream)?;
316 gpu.memset_async(self.moe_output, 0, self.sizes.moe_output, stream)?;
317 Ok(())
318 }
319
320 pub fn zero_all_rows(
335 &self,
336 gpu: &dyn GpuBackend,
337 stream: u64,
338 tokens: usize,
339 ) -> anyhow::Result<()> {
340 let m = self.max_batch_tokens.max(1);
341 let head = |n: usize| {
344 if tokens >= m || m == 0 || !n.is_multiple_of(m) {
345 n
346 } else {
347 n / m * tokens
348 }
349 };
350 for (ptr, n) in [
351 (self.hidden_states, self.sizes.hidden_states),
352 (self.residual, self.sizes.residual),
353 (self.norm_output, self.sizes.norm_output),
354 (self.qkv_output, self.sizes.qkv_output),
355 (self.attn_output, self.sizes.attn_output),
356 (self.gate_logits, self.sizes.gate_logits),
357 (self.moe_output, self.sizes.moe_output),
358 (self.ssm_qkvz, self.sizes.ssm_qkvz),
359 (self.ssm_ba, self.sizes.ssm_ba),
360 (self.ssm_deinterleaved, self.sizes.ssm_deinterleaved),
361 (self.ssm_gates, self.sizes.ssm_gates),
362 (self.ssm_conv_out_f32, self.sizes.ssm_conv_out_f32),
363 (self.expert_gate_out, self.sizes.expert_gate_out),
364 (self.expert_up_out, self.sizes.expert_up_out),
365 (self.expert_down_out, self.sizes.expert_down_out),
366 ] {
367 gpu.memset_async(ptr, 0, head(n), stream)?;
368 }
369 gpu.memset_async(
371 self.splitk_workspace,
372 0,
373 self.sizes.splitk_workspace,
374 stream,
375 )?;
376 gpu.memset_async(self.logits, 0, self.sizes.logits, stream)?;
377 gpu.memset_async(self.scratch, 0, self.sizes.scratch, stream)?;
378 Ok(())
379 }
380
381 pub fn zero_all(&self, gpu: &dyn GpuBackend, stream: u64) -> anyhow::Result<()> {
384 gpu.memset_async(self.hidden_states, 0, self.sizes.hidden_states, stream)?;
385 gpu.memset_async(self.residual, 0, self.sizes.residual, stream)?;
386 gpu.memset_async(self.norm_output, 0, self.sizes.norm_output, stream)?;
387 gpu.memset_async(self.qkv_output, 0, self.sizes.qkv_output, stream)?;
388 gpu.memset_async(self.attn_output, 0, self.sizes.attn_output, stream)?;
389 gpu.memset_async(self.gate_logits, 0, self.sizes.gate_logits, stream)?;
390 gpu.memset_async(self.moe_output, 0, self.sizes.moe_output, stream)?;
391 gpu.memset_async(self.ssm_qkvz, 0, self.sizes.ssm_qkvz, stream)?;
392 gpu.memset_async(self.ssm_ba, 0, self.sizes.ssm_ba, stream)?;
393 gpu.memset_async(
394 self.ssm_deinterleaved,
395 0,
396 self.sizes.ssm_deinterleaved,
397 stream,
398 )?;
399 gpu.memset_async(self.ssm_gates, 0, self.sizes.ssm_gates, stream)?;
400 gpu.memset_async(
401 self.ssm_conv_out_f32,
402 0,
403 self.sizes.ssm_conv_out_f32,
404 stream,
405 )?;
406 gpu.memset_async(
407 self.splitk_workspace,
408 0,
409 self.sizes.splitk_workspace,
410 stream,
411 )?;
412 gpu.memset_async(self.expert_gate_out, 0, self.sizes.expert_gate_out, stream)?;
413 gpu.memset_async(self.expert_up_out, 0, self.sizes.expert_up_out, stream)?;
414 gpu.memset_async(self.expert_down_out, 0, self.sizes.expert_down_out, stream)?;
415 gpu.memset_async(self.logits, 0, self.sizes.logits, stream)?;
416 gpu.memset_async(self.scratch, 0, self.sizes.scratch, stream)?;
417 Ok(())
418 }
419}